During semiconductor wafer processing, integrated circuits or die are formed on thin wafer substrates that are made of silicon or other materials. After wafer processing is complete, the die must be singulated or separated into individual die before they are packaged. This singulation process is referred to as wafer dicing. One technique that is used for wafer dicing is mechanical sawing. With this approach, a high speed rotating saw is used to separate adjacent die along kerf lines, which are also known as dicing channels or streets. Another technique that is used for wafer dicing is a laser-based approach that is referred to as stealth dicing. Both of these approaches are sequential techniques which can become time consuming when there are a large number of die that need to be singulated on a wafer. Mechanical dicing has a further disadvantage in that chipping and/or crack formation can occur which can decrease die strength resulting in reduced die reliability and wafer yields.
Plasma dicing is another technique that is used for wafer dicing. Plasma dicing is a dry etching process that does not require physical contact with a wafer thus tending to avoid issues inherent with mechanical dicing such as die chipping and cracking. With plasma dicing, the time to complete the dicing operation does not increase with smaller die and the larger number of kerf lines that need to be etched because plasma dicing provides a simultaneous separation of all die on a wafer with a single plasma etch process step. Plasma dicing is based on a multiplexed deep reactive ion etching (DRIE) technique and can be performed on wafers mounted in standard tape frames or carriers. To prepare wafers for plasma dicing, a lithographic process is used to expose kerf lines on the wafer. The exposed kerf lines typically extend to the edge of the wafer and therefore can include adjacent partial die near the edge. This lithographic process enables direct access by plasma during the etching step to etch through the wafer along the kerf lines. With plasma dicing after grinding (PDAG), also referred to as dicing post grinding (DPG), the wafer is thinned and mounted onto an adhesive underlayer or glue within a wafer carrier before undergoing the plasma singulation process.
If relatively large die are to be plasma diced on a wafer, the lithographic process performed prior to dicing will expose kerf lines that extend up to the edge of the wafer. Due to their size and corresponding large contact area with the adhesive underlayer in the wafer carrier, these die, including the partial die located near the edge of the wafer, remain temporarily well-bonded to the adhesive underlayer after plasma singulation and during subsequent processing steps (e.g., lamination, demounting, etc. . . . ), before pick and place tape release techniques are used to remove the die from the adhesive underlayer for packaging.
Smaller die will have a smaller contact area with the adhesive underlayer. Because the lithographic process performed prior to plasma dicing will expose kerf lines that extend up to the edge of the wafer, these die, and especially the partial die located near the edge of the wafer, are significantly more prone to chipping and cracking and subsequent delamination from the adhesive underlayer after plasma singulation is complete.
One technique that has been used to prevent this delamination is to use a protection ring inside the plasma reactor chamber of the plasma etch processing tool during plasma dicing. The protection ring is placed between the plasma source and the surface of the wafer and prevents the plasma from etching the outer peripheral edge of the wafer that includes the partial die. Use of the protection ring however leaves an unetched ring of material around the edge of the wafer that requires an additional process step for removal before pick and place techniques can be used for packaging the die.